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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_pcie___config.html">XAxiPcie_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains IP hardware configuration information.  <a href="struct_x_axi_pcie___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_axi_pcie.html" title="The XAxiPcie driver instance data. ">XAxiPcie</a> driver instance data.  <a href="struct_x_axi_pcie.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_pcie___bar_addr.html">XAxiPcie_BarAddr</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The user is required to use this strucuture when reading or writing translation vector between local bus BARs and AXI PCIe BARs.  <a href="struct_x_axi_pcie___bar_addr.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga7e5fb7cdef729030bf31e9c3651253b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga7e5fb7cdef729030bf31e9c3651253b1">XAXIPCIE_VSEC1</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:ga7e5fb7cdef729030bf31e9c3651253b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">First VSEC Register.  <a href="group__axipcie.html#ga7e5fb7cdef729030bf31e9c3651253b1">More...</a><br/></td></tr>
<tr class="separator:ga7e5fb7cdef729030bf31e9c3651253b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08b7198f8d99e2f00b912ae94f25d088"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga08b7198f8d99e2f00b912ae94f25d088">XAXIPCIE_VSEC2</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:ga08b7198f8d99e2f00b912ae94f25d088"><td class="mdescLeft">&#160;</td><td class="mdescRight">Second VSEC Register.  <a href="group__axipcie.html#ga08b7198f8d99e2f00b912ae94f25d088">More...</a><br/></td></tr>
<tr class="separator:ga08b7198f8d99e2f00b912ae94f25d088"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08e3f639ed3ca042d429630fec260654"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga08e3f639ed3ca042d429630fec260654">XAxiPcie_IsLinkUp</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga08e3f639ed3ca042d429630fec260654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether link is up or not.  <a href="group__axipcie.html#ga08e3f639ed3ca042d429630fec260654">More...</a><br/></td></tr>
<tr class="separator:ga08e3f639ed3ca042d429630fec260654"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4eff130db70eebadac90b43cbd2561fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga4eff130db70eebadac90b43cbd2561fa">XAxiPcie_IsEcamBusy</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga4eff130db70eebadac90b43cbd2561fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether ECAM is busy or not.  <a href="group__axipcie.html#ga4eff130db70eebadac90b43cbd2561fa">More...</a><br/></td></tr>
<tr class="separator:ga4eff130db70eebadac90b43cbd2561fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga911e4cd0c119271f6c01c9b1ac827df1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_pcie___config.html">XAxiPcie_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga911e4cd0c119271f6c01c9b1ac827df1">XAxiPcie_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga911e4cd0c119271f6c01c9b1ac827df1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lookup the device configuration based on the unique device ID.  <a href="group__axipcie.html#ga911e4cd0c119271f6c01c9b1ac827df1">More...</a><br/></td></tr>
<tr class="separator:ga911e4cd0c119271f6c01c9b1ac827df1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6eaa13c68af6eb2ca12ae556f9e0769b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga6eaa13c68af6eb2ca12ae556f9e0769b">XAxiPcie_CfgInitialize</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, <a class="el" href="struct_x_axi_pcie___config.html">XAxiPcie_Config</a> *CfgPtr, UINTPTR EffectiveAddress)</td></tr>
<tr class="memdesc:ga6eaa13c68af6eb2ca12ae556f9e0769b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the <a class="el" href="struct_x_axi_pcie.html" title="The XAxiPcie driver instance data. ">XAxiPcie</a> instance provided by the caller based on the given Config structure.  <a href="group__axipcie.html#ga6eaa13c68af6eb2ca12ae556f9e0769b">More...</a><br/></td></tr>
<tr class="separator:ga6eaa13c68af6eb2ca12ae556f9e0769b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga745d2811e366fbe0e5499cfef90adbcc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga745d2811e366fbe0e5499cfef90adbcc">XAxiPcie_GetVsecCapability</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *VersionPtr, u16 *NextCapPtr)</td></tr>
<tr class="memdesc:ga745d2811e366fbe0e5499cfef90adbcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This API is used to read the VSEC Capability Register.  <a href="group__axipcie.html#ga745d2811e366fbe0e5499cfef90adbcc">More...</a><br/></td></tr>
<tr class="separator:ga745d2811e366fbe0e5499cfef90adbcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa26f5255cb42e55351c7cb802f71d56c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gaa26f5255cb42e55351c7cb802f71d56c">XAxiPcie_GetVsecHeader</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *RevisionPtr, u16 *LengthPtr)</td></tr>
<tr class="memdesc:gaa26f5255cb42e55351c7cb802f71d56c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This API is used to read the VSEC Header Register.  <a href="group__axipcie.html#gaa26f5255cb42e55351c7cb802f71d56c">More...</a><br/></td></tr>
<tr class="separator:gaa26f5255cb42e55351c7cb802f71d56c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75ca6a068024666c0199ea90d3ce4276"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga75ca6a068024666c0199ea90d3ce4276">XAxiPcie_GetBridgeInfo</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 *Gen2Ptr, u8 *RootPortPtr, u8 *ECAMSizePtr)</td></tr>
<tr class="memdesc:ga75ca6a068024666c0199ea90d3ce4276"><td class="mdescLeft">&#160;</td><td class="mdescRight">This API Reads the Bridge info register.  <a href="group__axipcie.html#ga75ca6a068024666c0199ea90d3ce4276">More...</a><br/></td></tr>
<tr class="separator:ga75ca6a068024666c0199ea90d3ce4276"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77063428b5641d07910419770813c148"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga77063428b5641d07910419770813c148">XAxiPcie_GetRequesterId</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 *BusNumPtr, u8 *DevNumPtr, u8 *FunNumPtr, u8 *PortNumPtr)</td></tr>
<tr class="memdesc:ga77063428b5641d07910419770813c148"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the Bus Location register.  <a href="group__axipcie.html#ga77063428b5641d07910419770813c148">More...</a><br/></td></tr>
<tr class="separator:ga77063428b5641d07910419770813c148"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga372301905fec6833c06320fb45261cd7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga372301905fec6833c06320fb45261cd7">XAxiPcie_GetPhyStatusCtrl</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 *PhyState)</td></tr>
<tr class="memdesc:ga372301905fec6833c06320fb45261cd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This API is used to read the Phy Status/Control Register.  <a href="group__axipcie.html#ga372301905fec6833c06320fb45261cd7">More...</a><br/></td></tr>
<tr class="separator:ga372301905fec6833c06320fb45261cd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0899628f4ecfb6d3b05671933c375ae5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga0899628f4ecfb6d3b05671933c375ae5">XAxiPcie_GetRootPortStatusCtrl</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 *StatusPtr)</td></tr>
<tr class="memdesc:ga0899628f4ecfb6d3b05671933c375ae5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Root Port Status/Control Register.  <a href="group__axipcie.html#ga0899628f4ecfb6d3b05671933c375ae5">More...</a><br/></td></tr>
<tr class="separator:ga0899628f4ecfb6d3b05671933c375ae5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2860cd7b0180a99fb324c085fc8fa746"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga2860cd7b0180a99fb324c085fc8fa746">XAxiPcie_SetRootPortStatusCtrl</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 StatusData)</td></tr>
<tr class="memdesc:ga2860cd7b0180a99fb324c085fc8fa746"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write Value in Root Port Status/Control Register.  <a href="group__axipcie.html#ga2860cd7b0180a99fb324c085fc8fa746">More...</a><br/></td></tr>
<tr class="separator:ga2860cd7b0180a99fb324c085fc8fa746"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ce4f790929f629f225c2ef2fbcc2647"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga0ce4f790929f629f225c2ef2fbcc2647">XAxiPcie_SetRootPortMSIBase</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, unsigned long long MsiBase)</td></tr>
<tr class="memdesc:ga0ce4f790929f629f225c2ef2fbcc2647"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write MSI Base Address to Root Port MSI Base Address Register.  <a href="group__axipcie.html#ga0ce4f790929f629f225c2ef2fbcc2647">More...</a><br/></td></tr>
<tr class="separator:ga0ce4f790929f629f225c2ef2fbcc2647"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32604cb99f7d35107ee59ff121e0024d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga32604cb99f7d35107ee59ff121e0024d">XAxiPcie_GetRootPortErrFIFOMsg</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u16 *ReqIdPtr, u8 *ErrType, u8 *ErrValid)</td></tr>
<tr class="memdesc:ga32604cb99f7d35107ee59ff121e0024d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Root Port Error FIFO Message.  <a href="group__axipcie.html#ga32604cb99f7d35107ee59ff121e0024d">More...</a><br/></td></tr>
<tr class="separator:ga32604cb99f7d35107ee59ff121e0024d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga225811fdbd9b22b8208a83ca4d3818ce"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga225811fdbd9b22b8208a83ca4d3818ce">XAxiPcie_ClearRootPortErrFIFOMsg</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga225811fdbd9b22b8208a83ca4d3818ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear Root Port Error FIFO Message.  <a href="group__axipcie.html#ga225811fdbd9b22b8208a83ca4d3818ce">More...</a><br/></td></tr>
<tr class="separator:ga225811fdbd9b22b8208a83ca4d3818ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b13520d9f4472bc16cfa5a6266f6795"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga8b13520d9f4472bc16cfa5a6266f6795">XAxiPcie_GetRootPortIntFIFOReg</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u16 *ReqIdPtr, u16 *MsiAddr, u8 *MsiInt, u8 *IntValid, u16 *MsiMsgData)</td></tr>
<tr class="memdesc:ga8b13520d9f4472bc16cfa5a6266f6795"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Root Port Interrupt FIFO message Register 1 &amp; 2.  <a href="group__axipcie.html#ga8b13520d9f4472bc16cfa5a6266f6795">More...</a><br/></td></tr>
<tr class="separator:ga8b13520d9f4472bc16cfa5a6266f6795"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b043d41a5668f97f83518327023ea0d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga4b043d41a5668f97f83518327023ea0d">XAxiPcie_ClearRootPortIntFIFOReg</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga4b043d41a5668f97f83518327023ea0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear Root Port FIFO Interrupt message Register 1 &amp; 2.  <a href="group__axipcie.html#ga4b043d41a5668f97f83518327023ea0d">More...</a><br/></td></tr>
<tr class="separator:ga4b043d41a5668f97f83518327023ea0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19d8a1973231160bdd518b1c62bda3d4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga19d8a1973231160bdd518b1c62bda3d4">XAxiPcie_GetLocalBusBar2PcieBar</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 BarNumber, <a class="el" href="struct_x_axi_pcie___bar_addr.html">XAxiPcie_BarAddr</a> *BarAddrPtr)</td></tr>
<tr class="memdesc:ga19d8a1973231160bdd518b1c62bda3d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.  <a href="group__axipcie.html#ga19d8a1973231160bdd518b1c62bda3d4">More...</a><br/></td></tr>
<tr class="separator:ga19d8a1973231160bdd518b1c62bda3d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51ee29d03fbefc82b9208f46a12d5a06"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga51ee29d03fbefc82b9208f46a12d5a06">XAxiPcie_SetLocalBusBar2PcieBar</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 BarNumber, <a class="el" href="struct_x_axi_pcie___bar_addr.html">XAxiPcie_BarAddr</a> *BarAddrPtr)</td></tr>
<tr class="memdesc:ga51ee29d03fbefc82b9208f46a12d5a06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.  <a href="group__axipcie.html#ga51ee29d03fbefc82b9208f46a12d5a06">More...</a><br/></td></tr>
<tr class="separator:ga51ee29d03fbefc82b9208f46a12d5a06"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9494095b9350f455af9e7da5375d522"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gad9494095b9350f455af9e7da5375d522">XAxiPcie_ReadLocalConfigSpace</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u16 Offset, u32 *DataPtr)</td></tr>
<tr class="memdesc:gad9494095b9350f455af9e7da5375d522"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 32-bit value from one of this IP own configuration space.  <a href="group__axipcie.html#gad9494095b9350f455af9e7da5375d522">More...</a><br/></td></tr>
<tr class="separator:gad9494095b9350f455af9e7da5375d522"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbdf9a7e71effb96353079d1c177888b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gafbdf9a7e71effb96353079d1c177888b">XAxiPcie_WriteLocalConfigSpace</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u16 Offset, u32 Data)</td></tr>
<tr class="memdesc:gafbdf9a7e71effb96353079d1c177888b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write 32-bit value to one of this IP own configuration space.  <a href="group__axipcie.html#gafbdf9a7e71effb96353079d1c177888b">More...</a><br/></td></tr>
<tr class="separator:gafbdf9a7e71effb96353079d1c177888b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae4aafc6b1766352ed5347e40762f0649"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gae4aafc6b1766352ed5347e40762f0649">XAxiPcie_ReadRemoteConfigSpace</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 *DataPtr)</td></tr>
<tr class="memdesc:gae4aafc6b1766352ed5347e40762f0649"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 32-bit value from external PCIe Function's configuration space.  <a href="group__axipcie.html#gae4aafc6b1766352ed5347e40762f0649">More...</a><br/></td></tr>
<tr class="separator:gae4aafc6b1766352ed5347e40762f0649"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb4d67df95f1c7b0010e370312283f22"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gadb4d67df95f1c7b0010e370312283f22">XAxiPcie_WriteRemoteConfigSpace</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 Data)</td></tr>
<tr class="memdesc:gadb4d67df95f1c7b0010e370312283f22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write 32-bit value to external PCIe function's configuration space.  <a href="group__axipcie.html#gadb4d67df95f1c7b0010e370312283f22">More...</a><br/></td></tr>
<tr class="separator:gadb4d67df95f1c7b0010e370312283f22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga062809d176f81251886d5372c0714f7a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga062809d176f81251886d5372c0714f7a">XAxiPcie_EnableGlobalInterrupt</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga062809d176f81251886d5372c0714f7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Global Interrupt.  <a href="group__axipcie.html#ga062809d176f81251886d5372c0714f7a">More...</a><br/></td></tr>
<tr class="separator:ga062809d176f81251886d5372c0714f7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaace3ba2f6c70cd207c9c65d92c634ee8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gaace3ba2f6c70cd207c9c65d92c634ee8">XAxiPcie_DisableGlobalInterrupt</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaace3ba2f6c70cd207c9c65d92c634ee8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the Global Interrupt.  <a href="group__axipcie.html#gaace3ba2f6c70cd207c9c65d92c634ee8">More...</a><br/></td></tr>
<tr class="separator:gaace3ba2f6c70cd207c9c65d92c634ee8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22a95261655e78a944d1a2462031da57"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#ga22a95261655e78a944d1a2462031da57">XAxiPcie_EnableInterrupts</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 EnableMask)</td></tr>
<tr class="memdesc:ga22a95261655e78a944d1a2462031da57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the IP interrupt bits passed into "EnableMask".  <a href="group__axipcie.html#ga22a95261655e78a944d1a2462031da57">More...</a><br/></td></tr>
<tr class="separator:ga22a95261655e78a944d1a2462031da57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae238cf115bd039e0f7228e385c893aad"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gae238cf115bd039e0f7228e385c893aad">XAxiPcie_DisableInterrupts</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 DisableMask)</td></tr>
<tr class="memdesc:gae238cf115bd039e0f7228e385c893aad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the IP interrupt bits passed into "DisableMask".  <a href="group__axipcie.html#gae238cf115bd039e0f7228e385c893aad">More...</a><br/></td></tr>
<tr class="separator:gae238cf115bd039e0f7228e385c893aad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae118e9d7fd6b78ca0b8d4fd6694f9808"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gae118e9d7fd6b78ca0b8d4fd6694f9808">XAxiPcie_GetEnabledInterrupts</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 *EnabledMaskPtr)</td></tr>
<tr class="memdesc:gae118e9d7fd6b78ca0b8d4fd6694f9808"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the currently enabled interrupt bits of the IP and pass them back to the caller into "EnabledMask".  <a href="group__axipcie.html#gae118e9d7fd6b78ca0b8d4fd6694f9808">More...</a><br/></td></tr>
<tr class="separator:gae118e9d7fd6b78ca0b8d4fd6694f9808"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec39c65db1aeac38798a250a25298208"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gaec39c65db1aeac38798a250a25298208">XAxiPcie_GetPendingInterrupts</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 *PendingMaskPtr)</td></tr>
<tr class="memdesc:gaec39c65db1aeac38798a250a25298208"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the currently pending interrupt bits of the IP and pass them back to the caller into "PendingMask".  <a href="group__axipcie.html#gaec39c65db1aeac38798a250a25298208">More...</a><br/></td></tr>
<tr class="separator:gaec39c65db1aeac38798a250a25298208"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabdf66d0cb481a5eea62e1f98e71d9520"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axipcie.html#gabdf66d0cb481a5eea62e1f98e71d9520">XAxiPcie_ClearPendingInterrupts</a> (<a class="el" href="struct_x_axi_pcie.html">XAxiPcie</a> *InstancePtr, u32 ClearMask)</td></tr>
<tr class="memdesc:gabdf66d0cb481a5eea62e1f98e71d9520"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the currently pending interrupt bits of the IP passed from the caller into "ClearMask".  <a href="group__axipcie.html#gabdf66d0cb481a5eea62e1f98e71d9520">More...</a><br/></td></tr>
<tr class="separator:gabdf66d0cb481a5eea62e1f98e71d9520"><td class="memSeparator" colspan="2">&#160;</td></tr>
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